In an AI datacenter, 50 mV of voltage margin can be worth about 270 racks of compute per gigawatt of input electricity. To show how, this paper models two facilities that run the same Vera Rubin NVL72 racks at the same clock speeds, one at 0.80 V and one at 0.75 V. On published Vera Rubin power figures, the second draws about 8% less power per GPU and about 17 kW less per rack.
Margin is the supply voltage added above what the silicon needs to cover the worst-case voltage droop. Evolving AI workloads make that margin larger and harder to predict. As a result, platform and silicon teams often over-margin to compensate, costing them compute density and token throughput, while teams that margin too little see failures in the field.
Power delivery network (PDN) design in the age of AI takes a systematic approach to power management. This paper distills the foundation of that approach into four axioms, drawn from work with customers in AI and high-performance computing (HPC).
AXIOM 1: Test error must be minimized
AXIOM 2: Power envelopes must factor in both evolving workloads and PDN dynamics
AXIOM 3: AI systems require reactive or preemptive Ldi/dt (droop) mitigation
AXIOM 4: Co-architected control loops are a necessity for systems
Movellus addresses the four axioms in one stack through its Aeonic platform. The platform helps teams set the foundation of proper power architecture in the age of AI.
Read more here.
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