b12122
The update introduces optimizations for CUDA by fusing NVFP4 gate/up operations and GLU within MMQ, honoring requested precision in fused gate/up MMQ, sharing scale checks for NVFP4, skipping unused FP4 kernels, testing with W4A8 configurations without scales and with batching, and adding checks for gate_scale before loading fused NVFP4 gate scale.