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Tapping into the country’s strengths in manufacturing and engineering, NVIDIA is helping advance Korea’s physical AI ecosystem. The country’s industry leaders are applying accelerated computing, AI and simulation to everything from semiconductor manufacturing to robotics and autonomous vehicles. These efforts are helping bring physical AI from development into real-world production. Samsung Advances Semiconductor Engineering With […]
The latest update to llama.cpp introduces enhanced MoE (Mixture of Experts) cache functionality, enabling computation of cache misses on the CPU with a configurable CPU share. A new tuning script, moe-cache-tune.py, automatically determines optimal cache size and CPU share settings based on system performance. The update also improves scheduling efficiency, removes redundant sync operations, and refactors code for better maintainability, while maintaining compatibility across multiple platforms including macOS, Linux, Windows, and Android.
The llama.cpp v1.220.2 release introduces enhanced BF16 precision support across multiple components, aligning with reference implementations by moving specific operations like GLM4 family projections, MiMoVL vision matmuls, and Qwen3-TTS speaker encoder conv1d to BF16 where appropriate. Backends such as CUDA, Hexagon, OpenCL, WebGPU, and Vulkan now uniformly handle GGML_PREC_BF16 similarly to F32, while CPU, SpaceMIT, and ET backends extend flash attention support to BF16 with F32 accumulation. Flash attention tests now include BF16 cases, and the KQ multiplication in Llama is updated to request BF16 precision. A TODO remains in clip.cpp for future work.
A new fast path for d_state=64 has been added to the SSM_SCAN kernel in ggml-cuda, improving generation throughput for Zamba2-7B-Instruct from 11 to 15.1 tok/s—approximately a 35% increase—by eliminating CPU fallbacks for this state size. The change was verified with real-world Zamba2 hyperparameters and maintains correctness, though a separate 28% of scan calls still fall back to CPU due to an undiagnosed issue.
The ggml library has been updated to make tied selections in the radix Top-K algorithm deterministic on CUDA and Metal backends by replacing atomic compaction loops with a deterministic scheme using simdgroup scans and coalesced memory accesses. This change ensures byte-identical outputs across runs, improves performance by 20-45% on M5 Ultra hardware, and enables deterministic testing for Metal and ROCm. Redundant CUDA kernel resets were removed, and Vulkan/Metal changes were reduced or skipped.
The update qualifies calls to math functions like isnan and signbit with std:: to ensure compatibility with C++ standard library overloads, addressing issues on NetBSD 11.99.9/x86_64 with gcc 14.4.0. Additional C math function calls are standardized using std:: prefixes (e.g., std::fabs, std::copysign) instead of non-existent std::fabsf variants, improving accuracy by keeping computations in double precision. The change results in a minor behavioral difference with a relative error of at most 1.4e-7, well below test tolerances.
The server update addresses slot processing order by ensuring parent slots are visited before child slots, preventing delays caused by child tasks landing on lower slot IDs. This change ensures all child tasks join the same batch after being woken by their parent. Additionally, new test tags have been introduced for monitoring: __TEST_TAG_WAIT_PARENT_SLOT__ for child slot waits, __TEST_TAG_PROMPT_CACHE_RESTORE__ for prompt cache restores, and __TEST_TAG_PROMPT_CACHE_FULL_RESTORE__ when a cached prompt is fully contained in a new one based on token counts.
The metal backend's kernel_group_norm_f32 was updated to correctly handle tensors with ne03 > 1 and non-contiguous inputs by dispatching one threadgroup per (group, i03) pair, computing per-batch statistics, clamping group element count for incomplete groups, and supporting strided access via separate strides for source and destination. The fix also restricts GROUP_NORM to f32 inputs and improves performance through specialized pipeline variants.
The Vulkan implementation of the Fast Walsh-Hadamard Transform (FWHT) has been enhanced to support block widths up to 8192, using shared-memory shaders for larger blocks, and now includes F16 input capability via shader-float16, with pipelines created only when device limits allow. This update aligns Vulkan with CUDA's capabilities and improves efficiency by eliminating the need for F32-to-F16 conversions.
How vLLM migrated its CUDA build and compiled dependencies to the LibTorch Stable ABI, enabling compatible PyTorch upgrades without rebuilding vLLM.
arXiv:2611.07211v1 Announce Type: new Abstract: Looped transformers scale inference-time reasoning by repeatedly reusing a shared core, increasing computation without increasing parameter count. Serving prefilling and decoding with a uniform loop budget couples their costs. We present LoopDuet, a phase-dependent depth and training-free serving approach that selects the two budgets jointly while preserving decoding depth at prefilling boundaries. Our vLLM implementation gathers tokens requiring further recurrence into compact batches, turning the selected allocation into executable savings with existing weights and attention kernels. At runtime, a queue-age controller adjusts prefilling depth to retain quality as demand changes. Experiments on the full HotpotQA dataset with one A100-80GB demonstrate two benefits of this flexibility. First, separate phase budgets improve the quality--throughput trade-off: Huginn delivers 19\% more throughput than the fastest tested uniform setting meeting the same accuracy criterion, while a higher-throughput operating point gains 6.04 EM points over uniform depth eight at 97\% of its throughput. Second, the same execution mechanism retains more quality under load: on two evaluated OLMo arrival traces, adaptive prefilling gains 0.92--1.35 EM points over the most accurate tested fixed-depth controls at the same 100\% attainment of a one-second time-to-first-token target. Together, these results establish LoopDuet as a practical way to turn flexible model computation into higher serving capacity and better quality under load.
arXiv:2611.06397v1 Announce Type: new Abstract: Non-prefix KV-cache reuse encodes retrieved chunks independently and concatenates their caches. To find where a small repair budget should be spent, we vary the chunks around the answer-bearing one (the target) across three 7B-8B models and four datasets of dialogue memory, open-domain QA and API documentation. Reuse loses 19-100% of the context-dependent questions that full prefill answers, and it loses more when the other chunks are of the same kind as the target. Because the recoverable damage is spread over these other chunks, restoring a few of them recovers little, and the budget is better spent on the target. This works through contextual compatibility: recomputing the target against the reused cache beats inserting its full-prefill KV in all seven settings tested, although the recomputed KV stays far from the full-prefill KV. Question attention over reused caches, however, selects the target in at most 18.8% of development questions. A retriever finds it more often, and recomputing its top chunk after moving it next to the question significantly beats InfoFlow-style reordering at the same 5% budget in six of nine open-domain QA and API-documentation settings. On dialogue memory, though, recomputing chunks never significantly beats the token-level selector chosen for each setting.
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Optimized TOP_K performance on Hexagon backend by skipping bitonic sort for tiles whose maximum cannot surpass the k-th best value, replacing tile sort with top_k_scan() to reduce 256-float blocks using HVX max-reduce, and inserting only surviving elements into a sorted k-entry list. Supports k values from 2 to 64 and row widths over 1024 in both single-row and multi-row paths. NaN treated as -INF, ties preserve first-seen index. Eliminated scalar reads from VTCM in hex-top-k.
The update resolves issues with -hf tag matching in longer quantization names, ensuring tags start at token boundaries. It also adds support for underscores as separators in quantization tags, improving compatibility with filenames like step3p5_flash_Q4_K_S-00001-of-00012.gguf.
The ggml library now checks view bounds based on the actual bytes reached by strides, improving accuracy for strided views. Views are required to start from contiguous elements along dimension 0, ensuring correct data access. Convolution windows in delta_net are created with all rows at once to prevent stride-related issues.
arXiv:2611.04683v1 Announce Type: new Abstract: Random walks are fundamental to graph analytics, yet executing them efficiently on large, evolving graphs remains challenging. Existing approaches must balance sampling efficiency, update overhead, and memory consumption. Sampling structures optimized for throughput often incur substantial memory overhead and costly maintenance, whereas lightweight alternatives can suffer from high sampling latency on high-degree vertices or skewed weight distributions. These challenges become more pronounced on heterogeneous CPU--GPU platforms, where host memory provides capacity but GPU memory limits the amount of graph data that can benefit from parallel acceleration. We present FenixWalk, a memory-efficient random-walk system that combines unified in-place sampling with selective GPU acceleration for large-scale dynamic graphs. At its core, FenixWalk employs an in-place Fenwick representation that supports both rejection sampling and inverse-transform sampling without duplicating edge-level weight storage. This representation enables expected O(1) weight lookup for rejection sampling, together with O(log d) prefix sampling and updates. To exploit heterogeneous hardware efficiently, FenixWalk maintains the complete graph and its sampling structures in host memory while selectively placing frequently reused vertex-local samplers on the GPU. By transferring compact walker states instead of repeatedly migrating graph partitions, the system reduces cross-device communication and makes effective use of limited GPU memory. Experiments on large real-world graphs and representative random-walk workloads demonstrate that FenixWalk achieves average speedups ranging from 2.06x to 400.57x over existing random-walk systems.
