Qwen-Image-2.1-mflux-q4

Native MLX/mflux q4 conversion of `Qwen/Qwen-Image-2.1` for Apple silicon. The transformer and Qwen3-VL text encoder are both stored in MLX affine 4-bit format; the VAE uses the mflux Qwen Image 2.1 layout. This checkpoint was converted from upstream revision `790c92633540aa0cb11d9abf19eb46d861714758` with mflux 0.20.0 and MLX 0.32.2. It is intended for the reviewed low-memory loader in Rapid-MLX. Stock mflux 0.20.0 skips text-encoder quantization and cannot load this pack without that loader change. - 512x512, 40 steps: 4.68 GiB peak MLX memory - 1024x1024, 4 steps: 5.14 GiB peak MLX memory - packaged size: approximately 8.9 GB

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Native MLX/mflux q4 conversion of `Qwen/Qwen-Image-2.1` for Apple silicon. The transformer and Qwen3-VL text encoder are both stored in MLX affine 4-bit format; the VAE uses the mflux Qwen Image 2.1 layout. This checkpoint was converted from upstream revision `790c92633540aa0cb11d9abf19eb46d861714758` with mflux 0.20.0 and MLX 0.32.2. It is intended for the reviewed low-memory loader in Rapid-MLX. Stock mflux 0.20.0 skips text-encoder quantization and cannot load this pack without that loader change. - 512x512, 40 steps: 4.68 GiB peak MLX memory - 1024x1024, 4 steps: 5.14 GiB peak MLX memory - packaged size: approximately 8.9 GB

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